Senior Timing & Synthesis Engineer - Hybrid

A leading semiconductor company in Cambridge is looking for a Senior Engineer to manage timing constraints and synthesis for complex SoCs. The successful candidate will be responsible for developing and validating SDCs, driving synthesis towards optimal PPA, and ensuring robust timing closure in collaboration with various teams. Strong experience with SDC development and synthesis tools, as well as excellent scripting skills, are vital for this role. This position offers a hybrid work model and opportunities for professional growth.