Principal FPGA Engineer

Contract Type:Full-time, Permanent

Location:Cambridge, UK

Visa Sponsorship available

Join Nu Quantum - Shaping the Future of Technology

Nu Quantum is creating the Entanglement Fabric for quantum computing scale-out. Quantum computing can solve some of the world's biggest problems, but these applications require systems that are thousands of times more powerful than those available today.

Our networking architecture will unlock data centre-scale quantum computing by weaving together quantum processors to accelerate the path to fault-tolerance and transformational utility. Founded in 2018, Nu Quantum is a spin-out of the University of Cambridge's Cavendish Laboratory.

About the role

Reporting to the Head of Engineering and Operations, the role will involve directing the Control Group here at Nu Quantum as we build a scalable, distributed control system for quantum networking.

You will lead the Control group (in collaboration with Software and Electronics groups) to implement systems capable of low-latency, real-time control of the analogue, digital and optical components that make up the system. You will have experience working with Xilinx SoC platforms and will be developing custom packet processing gateware for timing critical applications.

As a Group Lead you will support team members in their career development, and technical endeavours, helping them in identifying technical problems that are valuable to solve, and ways to develop robust workflows. There will thus be opportunities for creative thinking and contributing to the company's strategy.

The successful candidate will join a highly collaborative environment and should be able to draw on their experience to strengthen system-level and strategic thinking within the team. In turn, they will be supported by our management team, and more specifically by our VP of Technology, our Project Management Office and our Head of Engineering and Operations for day-to-day operations.

What You'll be Doing

• Line management of the Control Group, facilitating their development towards career goals; aligning the growth of their skills with the needs of Nu Quantum.
• Responsible for technical decisions and process improvement within the team, building on your technical expertise to assist with system architecture, decision making, robust workflows, and technical delivery.
• Key technical contributor to the development of our quantum network control systems.
• Collaborate with hardware and software teams to define system architecture and with the Operations teams (PMO, Finance) to coordinate on budget forecast and tooling.
• Assisting with technical documentation, including requirements,technical reporting, design specifications, test plans, and test results.
• Embodying our company values, championing scientific integrity and fostering a collaborative working environment.
• Design, develop, and verify RTL code for Xilinx Zynq and Ultrascale devices.
• Implement high-performance data processing pipelines and interface protocols for real-time control of electronics.
• Design custom packet processing pipelines to distribute real-time events.
• Contribute to our in house developments for time synchronisation using White Rabbit technology.
• Investigate ultra low-latency message distribution over 10G/25G ethernet.
• Collaborate with hardware and software teams to define system architecture and integration strategies.
• Perform system-level debugging and performance tuning for FPGA-based timing critical applications.
• Contribute to best practice definition, automation and CI/CD flows.

• Proficient in SystemVerilog and/or VHDL with a solid understanding of RTL design principles.

• Hands-on experience with Xilinx Zynq and Ultrascale device families, including the Vivado toolchain, timing closure.
• Experience with low-latency network protocol implementation in gateware (e.g.network acceleration, TCP offload, packet processing/forwarding).
• Experience building hardware accelerators and/or networking interfaces for heterogeneous systems and hardware/software co-design.
• Familiarity with standard interface protocols (SPI, I2C).
• Familiarity with high speed buses and interfaces (AXI4, PCIe).
• Experience using SystemVerilog or Cocotb testbenches for verification, constrained random verification and the use of SVAs for protocol checking.
• Experience with industry standard development flows such as linting, CDC checks, synthesis and timing closure.
• Proficient in using debugging tools such as oscilloscopes, logic analyzers, and software debuggers.
• Excellent problem-solving skills and ability to work collaboratively in a multidisciplinary team.
• Strong written and verbal communication skills for documentation and reporting.
• Proficient in Python for scripting and modelling.

Desirable (nice to have but not required)

• Knowledge of PTP and White Rabbit protocols (IEEE 1588).
• Experience implementing custom PHYs and in depth knowledge of Xilinx GTX/GTH/GTY multi-gigabit transceivers.
• Experience implementing 10G/25G PHYs on Xilinx FPGAs.
• Experience in low latency and/or real-time systems.
• Experience using low latency network switches.
• Experience debugging RISC-V CPU subsystems.
• Verification using Cocotb and SystemVerilog, the use of SVAs within verification testbenches and Formal workflows.
• Experience with RF signal generation and processing, including the use of Direct Digital Synthesis (DDS) frequency synthesis techniques, RF communication protocols and modulation techniques.
• Proficiency in working with high-speed DACs and ADCs for RF and mixed-signal applications.

Why work with us?

At Nu Quantum, we celebrate diversity and are committed to creating an inclusive workplace where people of all identities, orientations, backgrounds, and experiences are empowered. We value diverse perspectives as a source of creativity and innovation and encourage applications from all backgrounds, including those from underrepresented and marginalised communities. Joining Nu Quantum means joining a team where you can grow professionally and be part of an inspiring mission to shape the future of technology.

Benefits

• Flexible working options

• Group DIS cover (4 x salary)
• 1 month paid Sabbatical after 4 years of service
• Generous Employee Referral Scheme
• Private Medical and Dental Cover (With Vitality and Bupa)
• On-site gym membership
• Cycle scheme
• Refreshments, including fruit and beverages, are available in the office.
• 28 days annual leave, including a 3-day company shutdown period + UK Public Holidays
• Option to purchase up to 5 days holiday per year
• Enhanced paid family leave policies
• Access to the Cambridge Botanical Gardens