Hardware Designer

Contract Layout Designer

Security clearance essential

Southampton HQ 1-2 days a week

Up to £52 p/h Inside IR35

We are seeking a talented and experienced Layout Designer with live security clearance to join our growing team in Southampton. This is an exciting opportunity for an engineer with strong analogue and mixed-signal IC layout expertise to contribute to the development of complex integrated circuit designs within a collaborative and innovative environment.

The ideal candidate will possess a formal qualification in Electronics, Microelectronics, Semiconductor Engineering, or a related discipline, together with several years of hands-on experience delivering complex IC layouts. Experience with CMOS Readout ICs or imaging devices would be highly advantageous.

About the Role

As part of our mixed-signal IC design team, you will work at transistor, cell, and block level, translating schematic designs into robust and efficient layout solutions. You will be responsible for delivering high-quality layouts that meet both technical specifications and project timelines while adhering to industry best practices.

Key Responsibilities

• Develop IC layouts in accordance with design specifications and project requirements.
• Apply and promote layout best practices to ensure optimal performance, manufacturability, and reliability.
• Create bespoke analogue, digital, and mixed-signal layout designs.
• Perform DRC (Design Rule Check) and LVS (Layout Versus Schematic) verification at transistor and block level.
• Collaborate closely with IC design engineers to optimise layout implementation and resolve design challenges.
• Support the successful delivery of projects within agreed schedules.

Essential

• Strong analogue and mixed-signal IC layout experience.
• Several years of experience working on complex IC designs.
• Proven ability to complete custom analogue, digital, and mixed-signal layouts.
• Experience performing DRC and LVS verification.
• Strong understanding of semiconductor layout methodologies and best practices.
• Experience with CMOS Readout ICs.
• Image sensor or pixel design experience.
• Top-level verification experience.
• Exposure to a broad range of semiconductor technology nodes.
• Experience working on imaging or sensor-based IC products.