ASIC Verification Engineer - System on Chip / UVM

ASIC Verification Engineer - System on Chip / UVM

• Do you have 8+ years experience in ASIC Verification?
• Experience of digital logic design and verification techniques?
• Knowledge of protocols such as PCIe, DDR, UCIe, and Ethernet?
• Do you want to join a scale-up in the wonderful city of Amsterdam?

If so, then this could be the one for you!

We're working with a genuinely exciting, security focused semiconductor company and they need a number for ASIC Verification Engineers to join the team in Amsterdam on a permanent basis working on a fully onsite capacity.

Sound good? Thought it might!

What's in it for you?

You will receive an excellent base salary, plus equity and will be working on some cutting edge scientific and nano-engineering technology - all this whilst working within a diverse and multicultural team.

Please note - this is a fully, 100% onsite role with zero hybrid working.

What we look for in return is:

• Bachelor's degree in Electrical or Computer Engineering (Master's preferred).
• 8+ years of experience in ASIC verification.
• Strong knowledge of digital logic design and verification techniques.
• Hands-on experience verifying processor-based systems.
• Proven track record in developing and deploying large SoCs on emulation platforms.
• Deep understanding of protocols such as PCIe, DDR, UCIe, and Ethernet.
• Proficiency in C/C++ and hardware verification languages (e.g., SystemVerilog, SystemC).
• Skilled in scripting languages such as Tcl, Perl, or Python.
• Expertise in at least one verification methodology (UVM, formal verification, or emulation).
• Full-cycle verification experience-from requirements gathering and planning to implementation, testing, and documentation.
• Familiarity with HW/SW co-simulation or emulation and tools like QEMU is advantageous, though not mandatory.

If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on

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