Lead Verification Engineer - SystemVerilog/UVM (Hybrid)

A recruitment firm in Northern Ireland is looking for a Verification Engineer on a contract basis in Belfast. This role involves leading verification activities from requirements to full design validation. You will collaborate with hardware teams and develop SystemVerilog/UVM test cases while working in a hybrid environment. The ideal candidate should possess strong skills in ASIC/FPGA development and UVM, alongside a relevant degree. Competitive hourly rates are offered.